LS830-3 [Linear Systems]
ULTRA LOW LEAKAGE LOW DRIFT MONOLITHIC DUAL N-CHANNEL JFET; 超低漏电低漂移整体式双N沟道JFET
| 型号： | LS830-3 |
| 厂家： | 
Linear Systems |
| 描述： | ULTRA LOW LEAKAGE LOW DRIFT MONOLITHIC DUAL N-CHANNEL JFET |
| 文件： | 总2页 (文件大小：31K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LS830 LS831 LS832 LS833
ULTRA LOW LEAKAGE LOW DRIFT
MONOLITHIC DUAL N-CHANNEL JFET
Linear Integrated Systems
FEATURES
ULTRA LOW DRIFT
ULTRA LOW LEAKAGE
LOW NOISE
|∆VGS1-2 /∆T|= 5µV/°C max.
IG = 80fA TYP.
en= 70nV/√Hz TYP.
LOW CAPACITANCE
CISS= 3pf MAX.
ABSOLUTE MAXIMUM RATINGS NOTE 1
@ 25°C (unless otherwise noted)
Maximum Temperatures
S1
G2
G1
S2
3
1
5
7
Storage Temperature
Operating Junction Temperature
-65° to +150°C
+150°C
D1
D1 2
6 D2
Maximum Voltage and Current for Each Transistor NOTE 1
-VGSS
-VDSO
-IG(f)
-IG
Gate Voltage to Drain or Source
Drain to Source Voltage
Gate Forward Current
40V
D2
40V
S1
G2
10mA
10µA
G1
S2
Gate Reverse Current
22 X 20 MILS
BOTTOM VIEW
Maximum Power Dissipation
Device Dissipation @ Free Air - Total
40mW @ +125°C
ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted)
SYMBOL CHARACTERISTICS LS830 LS831 LS832 LS833
|∆VGS1-2 /∆T| max. Drift vs. Temperature
UNITS CONDITIONS
5
10
20
75
µV/°C
VDG= 10V
ID= 30µA
TA= -55°C to +125°C
|VGS1-2| max.
-IG max
-IG max
-IGSS
Offset Voltage
25
25
25
25
mV
pA
nA
pA
nA
VDG= 10V
ID= 30µA
Operating
0.1
0.1
0.2
0.5
0.1
0.1
0.2
0.5
0.1
0.1
0.2
0.5
0.5
0.5
1.0
1.0
High Temperature
At Full Conduction
High Temperature
TA= +125°C
-IGSS
VGS= 0
VGS= -20V
TA= +125°C
SYMBOL
BVGSS
CHARACTERISTICS
Breakdown Voltage
MIN.
40
TYP.
MAX.
UNITS
CONDITIONS
VDS= 0
60
--
--
--
V
V
ID= 1nA
ID= 0
BVGGO
Gate-to-Gate Breakdown
40
IG= 1nA
IS= 0
TRANSCONDUCTANCE
Full Conduction
Yfss
Yfs
70
50
--
300
100
1
500
200
5
µmho VDG= 10V
µmho VDG= 10V
%
VGS= 0
ID= 30µA
f= 1kHz
f= 1kHz
Typical Operation
|Yfs1-2/Yfs|
Mismatch
DRAIN CURRENT
Full Conduction
IDSS
60
--
400
2
1000
5
µA
VDG= 10V
VGS= 0
|IDSS1-2/IDSS
|
Mismatch at Full Conduction
%
GATE VOLTAGE
Pinchoff Voltage
Operating Range
VGS(off) or VP
VGS
0.6
--
2
4.5
4
V
V
VDS= 10V
VDG= 10V
ID= 1nA
ID= 30µA
--
GATE CURRENT
Gate-to-Gate Leakage
IGGO
--
1
--
pA
VGG= 20V
Linear Integrated Systems 4042 Clipper Court, Fremont, CA 94538 • TEL: (510) 490-9160 • FAX: (510) 353-0261
SYMBOL
CHARACTERISTICS
MIN.
TYP.
MAX. UNITS
CONDITIONS
OUTPUT CONDUCTANCE
YOSS
YOS
Full Conduction
Operating
--
--
--
--
--
--
5
µmho
µmho
µmho
VDG= 10V
VDG= 10V
VGS= 0
0.5
0.1
ID= 30µA
|YOS1-2
|
Differential
COMMON MODE REJECTION
CMR
CMR
-20 log |∆VGS1-2/∆VDS
|
--
--
90
90
--
--
dB
dB
∆VDS= 10 to 20V
∆VDS= 5 to 10V
ID= 30µA
ID= 30µA
-20 log |∆VGS1-2/∆VDS
NOISE
|
NF
en
Figure
--
--
--
1
dB
VDS= 10V
f= 100Hz
VGS= 0
NBW= 6Hz
RG= 10MΩ
Voltage
20
70
nV/√Hz VDG= 10V
ID= 30µA f= 10Hz
NBW= 1Hz
CAPACITANCE
Input
CISS
CRSS
CDD
--
--
--
--
--
--
3
pF
pF
pF
VDS= 10V
VDS= 10V
VDG= 10V
VGS= 0
VGS= 0
ID= 30µA
f= 1MHz
f= 1MHz
Reverse Transfer
Drain-to-Drain
1.5
0.1
P-DIP
TO-71
Six Lead
0.230
TO-78
(8.13)
(7.37)
0.320
0.290
0.335
0.370
DIA.
0.195
0.175
0.209
0.305
0.335
DIA.
S1 1
G2
SS
8
7
0.405
(10.29)
MAX.
MAX.
0.030
MAX.
0.150
0.115
0.165
0.185
0.040
D1 2
SS 3
G1 4
0.016
0.019
DIM. A
6 D2
5 S2
MIN. 0.500
6 LEADS
0.019
0.016
0.500 MIN.
0.050
0.016
0.021
DIM. B
SEATING
PLANE
DIA.
0.200
0.100
0.100
0.029
0.045
SOIC
3
7
3
7
2
1
8
4
5
6
2
4
0.150 (3.81)
0.158 (4.01)
1
8
5
6
0.100
S1 1
D1 2
SS
G1 4
8
7
6
5
G2
SS
D2
S2
45°
45°
0.188
0.197
(4.78)
(5.00)
3
0.046
0.036
0.048
0.028
0.028
0.034
(5.79)
0.228
(6.20)
0.244
NOTES:
1. These ratings are limiting values above which the serviceability of any semiconductor may be impaired.
Linear Integrated Systems 4042 Clipper Court, Fremont, CA 94538 • TEL: (510) 490-9160 • FAX: (510) 353-0261
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